Thank you for your support.
In the High-Speed I/O (HSIO) of Xeon D-1700, I have implemented NVMe on the PCIex1 port assigned to PCH PCIe Cluster 0 Root Port 0.
When I performed a reset on NVMe, I encountered a Master Abort on the LAN controller implemented on the PCIex4 port assigned to PCH PCIe Cluster 1 Root Port 4 for some reason.
Has anyone experienced such an issue before?
Also, if there are any possible factors to consider, please let me know.
Hello AAA20,
Thank you for posting in the community!
To ensure you receive the most specialized assistance, we have a dedicated forum that addresses these specific concerns. Therefore, I will be moving this discussion to our Server Forum. This will allow our knowledgeable community and experts to provide you with timely and accurate solutions.
Best regards,
Norman S.
Intel Customer Support Engineer
Hello AAA20,
Greetings!
As this is a tray processor, we request you to raise a technical case in the embedded community and select the appropriate embedded forum (for Xeon, choose ‘Embedded Server’).
Additionally, please contact the place of purchase for further assistance if you prefer not to use the public community forum.
Below is the link to the embedded community
https://community.intel.com/t5/Embedded-Products/ct-p/embedded-products
Regards,
Pujeeth
Intel Customer Support Technician